The use of packaged semiconductor material in an integrated circuit or multi-chip module device for many electronic applications is well known. Such devices enable large scale electronic systems to be substantially reduced in size, thereby permitting the overall size and weight of a device containing such a large scale electronic system to be reduced as well.
This reduction in size and weight is especially important for applications where the size and weight of the device are crucial design parameters, such as in aerospace applications. Many of these devices, representing today's advanced technology integrated circuit devices and multi-chip modules, are developed for commercial computer and other mass market applications, and are available only in plastic or metal packages with low radiation survivability. Unfortunately, these devices are susceptible to electromagnetic interference which can cause the operation of the device to be unreliable.
To prevent electromagnetic interference (EMI) from detracting from the performance of packaged semiconductor devices, EMI shielding has been utilized. For example, reference may be made to the following Japanese patent publications, which are incorporated by reference as if fully set forth herein: Japanese patent publication No. 60-180150, published Sep. 13, 1985; Japanese patent publication No. 2-237053, published Sep. 19, 1990; and Japanese patent publication No. 4-94560, published Mar. 26, 1992.
Two of the foregoing Japanese patent publications, numbers 60-180150 and 4-94560, disclose semiconductor devices enclosed within a plastic package and surrounded by a thin grounded metallic plating to absorb or reflect unwanted EMI. While the shielding of the semiconductor devices described in these Japanese patent publications are capable of preventing malfunctions due to EMI, they cannot adequately shield the semiconductor device from the hazards encountered in a spacecraft environment. The spacecraft environment hazards, including high energy electron, proton, and cosmic ray damage, penetrate the relatively thin protective layer afforded by the EMI shielding, causing the semiconductor device to malfunction in a relatively short time.
Similarly, Japanese patent publication number 2-237053 discloses surrounding the semiconductor device with an EMI wave absorber material in a metal package. The semiconductor device and wave absorber material are contained within a recess in a dielectric material, and further encased within a metal case or package. In this way, radiation of EMI waves outside of the package are substantially reduced. As discussed previously, EMI shielding is not adequate to protect the semiconductor device from the hazards encountered in the spacecraft environment.
Typical silicon integrated circuit plastic packaged devices fail to operate when exposed to total doses of two to fifteen kilorads. The use of ceramic or metal devices, either screened for radiation tolerance or designed for the internal die to meet high radiation levels, have been proposed to protect the semiconductor device from the eventual damaging doses of radiation found in the spacecraft environment. The design and manufacture of such a radiation tolerant die is both expensive and difficult, thus many commercially available integrated circuit and multi-chip modules are not available for radiation tolerant applications. As a result, commercially available packaged silicon integrated circuit devices for use in a spacecraft environment such as low earth orbit, geostationary, or deep space probe, are not feasible. This is especially true for applications like communications satellites, where continuous operation of the application for eight to fifteen years is desired.
Therefore, it would be highly desirable to have a new and improved radiation shielded and packaged silicon integrated circuit device for use in a spacecraft environment. Such a radiation shielded silicon integrated circuit device should be relatively inexpensive to manufacture.
U.S. Pat. No. 4,833,334, which is incorporated by reference as if fully set forth herein, describes the use of a protective box to house sensitive electronic components. This protective box is partially composed of a high atomic weight material to effectively shield against X-rays.
Although the protective box is effective in shielding its contents from harmful X-rays, this approach has the serious disadvantage of adding substantial bulk and weight to electronic circuit assemblies protected in this manner. Moreover, it would be expensive to provide this type of protection to individual integrated circuits as manufacturing custom boxes for each circuit configuration would undoubtedly be costly.
Japanese patent publication number 56-103452, published Aug. 18, 1981, which is incorporated by reference as if fully set forth herein, describes a packaged semiconductor device having external leads connected to an internal semiconductor, wherein the semiconductor is protected from radiation by projections in a base portion of the container body. The projections surround the semiconductor and project up from the base to a height sufficient to block radiation which may penetrate glass feed-throughs. The glass feed-throughs seal the gap between the device and the package leads as they pass through the package body. While the projections aid in protecting the semiconductor from harmful radiation, they also add weight. The additional weight is critical and very undesirable in space applications.
The amount of shielding required to protect a packaged semiconductor device has been reduced by using a method known as spot shielding. An example of spot shielding is disclosed in Japanese patent publication number 62-125651, published Jun. 6, 1987, which is incorporated by reference as if fully set forth herein. Therein, the deterioration of a semiconductor integrated circuit due to radiation is reduced by attaching a double layered shield film to a sealing cover on an upper surface of the semiconductor package and attaching another double layered shield film to a lower surface of the package. The double layered shield film includes an outer light element layer and an inner heavy element layer to prevent incident radioactive rays from invading the package.
Although such a double layered shield film arrangement could be capable of providing some protection for a semiconductor device from radiation, the shielding is not acceptable for some applications. For example, the semiconductor device must be capable of withstanding the enormous forces exerted during acceleration periods. These forces sometimes approach upwards of thirty thousand times the Earth's gravitational pull. Under such an incredible force, the upper shield film is subject to tearing off from the sealing cover. In addition, the upper shield film is in a cantilevered position on the sealing cover. Thus, an edge of the shield film can be pried away from the sealing cover, thereby enabling the shield film to be completely torn away from the sealing cover.
Furthermore, the use of a double layer shield film only slightly reduces the weight of the package. It also increases the size of the package unnecessarily.
Another embodiment disclosed in Japanese patent publication No. 62-12561 includes a semiconductor device completely surrounded with a protective material to form an outermost protective layer. A cover shield and a well shield manufactured from another protective material nearly surround the semiconductor to protect it from radiation which penetrates the outermost protective layer.
The amount of shielding required to protect the semiconductor unnecessarily increases the weight and expense of such a semiconductor device.
Japanese patent publication number 61-4249, published Jan. 10, 1986, which is incorporated by reference as if fully set forth herein, describes a spot shielded semiconductor device which utilizes a single layer shield film. This enables the weight of the package to be reduced. In addition, the upper shield film is more securely attached to the package.
Significant disadvantages of the spot shielding method include an increase in the thickness of the device, increased weight of the device, and increased exposure of the semiconductor to side angle radiation due to the shielding being spaced apart from the semiconductor. In addition, a bottom spot shield often cannot be used due to the offset in height which cannot be accommodated by a fixed device lead length. This causes problems when the bottom shield is used on a semiconductor device in conjunction with a printed circuit board in a through hole package style. Furthermore, the spot shielded packaged semiconductor integrated circuit device provides no mechanical support for the spot shields except for the adhesive used to attach it to the surface of the package.
Therefore, it would be highly desirable to have a new and improved radiation shielded and packaged silicon integrated circuit device which protects the integrated circuit device from side angle radiation. Such a radiation shielded silicon integrated circuit device should be light in weight and should be able to withstand the forces encountered during the acceleration of a spacecraft.